Agilent Technologies' high-performance 32-Gb / s bit error rate tester was unveiled at the European Optical Fiber Communication Exhibition (ECOC)
Suitable for product design, device characterization and product testing
Beijing, September 26, 2012-Agilent Technologies (NYSE: A) has announced that it will be demonstrating a 32 at the ECOC show in Amsterdam (Amsterdam RAI International Convention and Exhibition Center, Hall 1, Hall 712) on September 17-19. -Gb / s bit error rate tester.
The N4960A high-performance modular bit error rate tester (BERT) is suitable for product design, device characterization, and product testing of 32 Gb / s devices and systems. The tester has 17-Gb / s and 32-Gb / s configurations. The N4960A is excellent for 100G Ethernet, CEI 28G VSR and 32G Fibre Channel applications.
Juergen Beck, general manager of Agilent's digital photon test department, said: "Agilent N4960A 32-Gb / s BERT is a more cost-effective test solution for high-performance receivers above 28 Gb / s. This equipment and a series of Agilent BERT instruments Other new products are extremely versatile and cover the needs from cost-effective product testing to high-performance instruments in advanced research. "
These instruments are equipped with a test front end-a pattern generator and an error detector that can run at full speed without an external multiplexer or demultiplexer. A one-meter cable connects them to a half-rack high BERT controller, providing clock signals, controlling communication, and powering the test front end. The architecture design of this test front end can directly generate and process the output signal of the pattern generator and the input signal of the error detector. This architecture minimizes the length of the cable between the test point and the device under test, significantly reducing signal attenuation and distortion that are critical for high-speed data signals.
The pattern generator provides PRBS patterns generated by hardware, and user-defined patterns up to 8 Mb can also be used. In addition, there is a general telecommunications and digital communications enhanced test pattern library. The powerful pattern editing tool significantly simplifies the generation and modification of user patterns. Users can use the Signal Integrity Studio software provided in the instrument to control the system. The software simplifies various operations through an intuitive setting and control interface.
Four single-channel systems meet the needs of four data channels of 25.78 or 28 Gb / s or more for 100G Ethernet applications. The four-channel configuration can be equipped with a synchronous clock or four asynchronous clocks. Other types of four-channel BERT can only be used with synchronous clocks, so it is not possible to use a separate clock signal for each channel to verify communication ASICs (such as variable-speed chips) and system crosstalk indicators, which is required by some of the latest standards.
The modular configuration allows users to achieve the design goal of 100G step by step: first buy a single-channel BERT to carry out the basic 28G link design. After the basic design is stabilized, users can purchase another three channels to achieve 100G operation, thereby effectively reducing pre-expenditure and investment. For devices with built-in error detection and counting functions, the N4960A also supports assembly solutions that only assemble pattern generators.
The N4960A modular BERT achieves excellent performance at an affordable price. It is one of the new products that Agilent acquired Centellax test and measurement business in May 2012. These products significantly reduce the number of components, resulting in cost reduction and increased availability; currently only available exclusively from Agilent.
(This article is transferred from the electronic engineering world: http: //Test_and_measurement/2012/0927/article_6018.html)
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